Skip to main content

CompactPCI on VxWorks: Driver Design and Interrupt Control

·599 words·3 mins
VxWorks CompactPCI Embedded Systems Device-Drivers Interrupt Handling PCI RTOS Real-Time Systems
Table of Contents

CompactPCI on VxWorks: Driver Design and Interrupt Control

CompactPCI (cPCI) combined with VxWorks provides a robust platform for high-reliability, real-time embedded systems. This article details the practical implementation of cPCI device drivers under VxWorks, focusing on PCI configuration space management, interrupt handling, and task synchronization.

🧭 Introduction to cPCI and VxWorks
#

CompactPCI is widely adopted in industrial and mission-critical systems due to its:

  • High bandwidth and performance
  • Rugged Eurocard form factor
  • Strong ecosystem and standardization

VxWorks, a mature RTOS, complements cPCI with:

  • Deterministic scheduling
  • Low-latency interrupt handling
  • Efficient inter-task communication

This combination is particularly suitable for real-time data acquisition systems such as petroleum logging platforms, where reliability and responsiveness are critical.

🔌 CompactPCI Architecture and Interface
#

PCI Bus Fundamentals
#

CompactPCI is fully compatible with the PCI specification:

  • 32/64-bit multiplexed address/data bus
  • 33 MHz operation (132 MB/s peak bandwidth)
  • Multi-master capability
  • Plug-and-Play via configuration space

PLX PCI9054 Bridge
#

The PCI9054 is commonly used as the interface controller:

  • PCI 2.2 compliant (32-bit / 33 MHz)
  • Supports burst transfers up to 132 MB/s
  • LOCAL bus configured in target mode (C mode)

Supported Data Transfer Modes
#

  1. PCI Initiator – LOCAL bus initiates PCI transactions
  2. PCI Target – PCI master accesses LOCAL bus (typical for register access)
  3. DMA – High-speed bulk data transfer

🧩 PCI Configuration Space in VxWorks
#

PCI devices expose three address spaces:

  • Configuration Space (256 bytes)
  • Memory Space
  • I/O Space

Key Configuration Elements
#

  • Vendor ID / Device ID
  • Class Code
  • Base Address Registers (BARs)

BARs define required address regions and enable dynamic allocation without conflicts.

Device Initialization Workflow
#

1. Device Discovery
#

pciFindDevice(vendorId, deviceId, index, &busNo, &deviceNo, &funcNo);

2. Read/Write Configuration Registers
#

pciConfigInLong(busNo, deviceNo, funcNo, offset, &value);
pciConfigOutLong(busNo, deviceNo, funcNo, offset, value);

3. Determine BAR Size
#

Write 0xFFFFFFFF to BAR and read back to calculate required space.

4. Memory Mapping
#

sysMmuMapAdd(...);

Example Initialization
#

STATUS Init_IP() {
    if (pciFindDevice(VID_IPCARRIER, DID_IPCARRIER, index,
                      &pBusNo, &pDeviceNo, &pFuncNo) != OK) {
        return NO_IP_ERROR;
    }

    IPCarrier_Inuse = 1;

    for (i = 0; i < 64; i += 4) {
        pciConfigInLong(pBusNo, pDeviceNo, pFuncNo, i, &temp);
    }

    sysMmuMapAdd(...);
}

⚡ Interrupt Handling in VxWorks
#

Interrupts are central to real-time responsiveness. In VxWorks:

  • ISRs execute outside task context
  • Latency is minimized
  • Work inside ISR must be minimal

PCI9054 Interrupt Control
#

  • Register offset: 0x68 (BAR0)
  • Controls interrupt enable/disable and status

Interrupt Setup
#

Connect ISR
#

pciIntConnect(INUM_TO_IVEC(0x27), IPIsr, 0);

Enable Interrupts
#

*(BaseAdd0 + 0x68) = 0x0F010900;

Disable Interrupts
#

*(BaseAdd0 + 0x68) = 0x0F000000;

ISR Design
#

void IPIsr(void) {
    semGive(sem_DepthInt);
}

🔄 Task Synchronization with Semaphores
#

Binary semaphores provide efficient synchronization between ISR and tasks:

  • ISR signals event via semGive()
  • Task blocks on semTake()
  • Avoids polling and reduces CPU overhead

Design Considerations
#

  • Keep ISR logic minimal
  • Defer heavy processing to tasks
  • Ensure semaphore is initialized before interrupt enable

This model guarantees deterministic behavior in high-frequency interrupt scenarios such as data acquisition.

🏭 Practical Deployment Considerations
#

Reliability Factors
#

  • Proper interrupt masking/unmasking
  • Correct BAR mapping and alignment
  • Stable EEPROM configuration for PCI9054

Performance Optimization
#

  • Use DMA for bulk transfers
  • Minimize context switching
  • Ensure cache/MMU settings align with hardware

Typical Use Cases
#

  • Multi-board signal processing systems
  • High-speed ADC/DAC modules
  • Industrial control and automation

📌 Conclusion
#

Implementing CompactPCI drivers on VxWorks requires careful coordination between PCI configuration, interrupt control, and task synchronization.

Key takeaways:

  • Use VxWorks PCI APIs for clean device enumeration and configuration
  • Control PCI9054 interrupts precisely for deterministic behavior
  • Leverage semaphores for safe ISR-to-task communication

When correctly designed, this architecture delivers high-performance, reliable real-time systems suitable for demanding industrial environments.

Related

Driving and Control Techniques for CompactPCI Bus under VxWorks
·1137 words·6 mins
VxWorks CompactPCI PCI RTOS Embedded Systems
VxWorks Serial Communication Design and Implementation Guide
·558 words·3 mins
VxWorks Serial Communication Embedded Systems RTOS Device-Drivers UART BSP Real-Time
How to Choose the Best RTOS for Embedded Systems
·896 words·5 mins
RTOS Embedded Systems VxWorks QNX FreeRTOS Zephyr Real-Time Systems System Architecture